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Altera?DesignHub
IntegerArithmeticIPCoresUser
Guide
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UpdatedforQuartusPrimeDesignSuite:25.1
OnlineVersion683490
SendFeedbackUG-010632025.04.16
Contents
Contents
1.IntegerArithmeticIPCores5
2.LPM_COUNTER(Counter)IPCore7
2.1.Features7
2.2.VerilogHDLPrototype8
2.3.VHDLComponentDeclaration8
2.4.VHDLLIBRARY_USEDeclaration9
2.5.Ports9
2.6.Parameters10
3.LPM_DIVIDEIntelFPGAIPCoreReferences12
3.1.Features12
3.2.VerilogHDLPrototype12
3.3.VHDLComponentDeclaration13
3.4.VHDLLIBRARY_USEDeclaration13
3.5.Ports13
3.6.Parameters14
4.LPM_MULT(Multiplier)IPCore16
4.1.Features16
4.2.VerilogHDLPrototype17
4.3.VHDLComponentDeclaration17
4.4.VHDLLIBRARY_USEDeclaration17
4.5.Signals18
4.6.ParametersforStratixV,ArriaV,CycloneV,andCyclone10LPDevices18
4.6.1.GeneralTab18
4.6.2.General2Tab19
4.6.3.PipeliningTab19
4.7.ParametersforStratix10,Arria10,andCyclone10GXDevices20
4.7.1.GeneralTab20
4.7.2.General2Tab20
4.7.3.Pipelining21
5.LPM_ADD_SUB(Adder/Subtractor)22
5.1.Features22
5.2.VerilogHDLPrototype23
5.3.VHDLComponentDeclaration23
5.4.VHDLLIBRARY_USEDeclaration23
5.5.Ports23
5.6.Parameters24
6.LPM_COMPARE(Comparator)26
6.1.Features26
6.2.VerilogHDLPrototype27