基本信息
文件名称:MAX96752解串器数据手册.pdf
文件大小:1.41 MB
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更新时间:2025-05-25
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文档摘要

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MAX96752GMSL2DeserializerwithDualLVDS(OLDI)

Output

GeneralDescriptionBenefitsandFeatures

TheMAX96752deserializersconvertasingle-ordual-link●1x4,2x4,or1x8OLDIOutputLaneConfigurations

GMSL?serialinputtosingleordualOLDI.Theyalso●3Gbpsor6GbpsForwardLinkRatesforSystemand

sendandreceiveside-channelandperipheralcontrolda-PowerFlexibility

ta,enablingfull-duplex,single-wiretransmissionofvideo

andbidirectionaldata.●Full-DuplexCapabilityOveraSingleWire

TheOLDIoutputcanbeconfiguredassingle-port(4or8●SupportsUpto300MHzPCLK

lanes)ordual-port(2x4lanes)forflexibilityindrivingdis-●SupportsVideoReplicationandDual-ViewSplittingfor

playswithavarietyofresolutions.Eachportaccommo-DrivingTwoDisplays

datespixelclockratesofupto150MHz,andindual-port●UsesLow-Cost50ΩCoaxor100ΩSTPCables

mode,theMAX96752supportacombinedpixelclockof

2

upto300MHz.●ForwardandReverseISor7.1TDMAudio

2●OptionalInternalVRegulator

TheGMSL2concurrentcontrolchanneloperatesinICor

2

UARTmode.Twoadditionalpas